Additionneur/soustracteur 24 bits

Bonjour tout le monde,
Je suis débutante dans la programmation hardware (VHDL), j'ai essayé d'implémenter un additionneur/ soustracteur sur 24 bits, mais lors de la compilation j'ai eu 4 erreurs et j'ai pas me débrouiller surtout que je suis sûr de la syntaxe!!! Je travaille avec le quartus II comme logiciel, i need your help pleaseeeeeee
Voilà le code:


library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;
entity add_soust24bits is
port(
clk: in std_logic;
A: in std_logic_vector(23 downto 0);
B: in std_logic_vector(23 downto 0);
add_soust: in std_logic;
sum_R: out std_logic_vector(23 downto 0);
c_out_R: out std_logic);
end add_soust24bits;
architecture arch_add_24 of add_soust24bits is
component add_complet
port( a:in std_logic;
b:in std_logic;
c_in: in std_logic;
sum: out std_logic;
c_out: out std_logic);
end component add_complet;
signal Co_I: std_logic_vector(22 downto 0);
signal A_R, B_R, C: std_logic_vector(23 downto 0);
signal c_in_R, Cout:std_logic;
signal Bt: std_logic_vector(23 downto 0);
begin
Bt <= B when add_soust='0' else not B;
load_reg: process(clk)
begin
if (clk'event and clk='1') then
A_R <= A;
B_R <= Bt;
c_in_R <= add_soust;
end if;
end process load_reg;

addition: block
c0: add_complet port map
( a => A_R(0);
b => B_R(0);
c_in => add_soust;
sum => c(0);
c_out => Co_I(0));
loop_c1to22 : for i in 1 to 22 generate
c1to22: add_complet port map(
A_R(i), B_R(i), Co_I(i-1), c(i), Co_I(0));
end generate loop_c1to22;
c23: add_complet port map(
A_R(23), B_R(23), Co_I(22), c(23),Cout);
end block addition;

res_add: process(clk)
begin
if(clk'event and clk ='1')then
sum_R <= C ;
c_out_R <= Cout ;
end if;
end process res_add;
end arch_add_24;




et voilà les erreurs:

1- VHDL syntaxe error at add_soust24bits near text "c0"
2- VHDL syntaxe error at add_soust24bits near text "end"; expecting "function"
3- VHDL syntaxe error at add_soust24bits near text "then"; expecting "<="
4- VHDL syntaxe error at add_soust24bits near text "if"; expecting "block"